*PGY-SSM SD/SDIO/eMMC Protocol Analyzer ▼
PGY-SSM SD/SDIO/eMMC Protocol Analyzer is the comprehensive Protocol Analyzer with multiple features to capture and debug communication between host and memory under test. PGY-SSM Protocol Analyzer supports SD, SDIO and eMMC for data rates up to 200MHz DDR mode. PGY-SSM is industry’s first eMMC protocol analyzer that supports version 4.41, 4.51, 5.0 and 5.1 specifications. The innovative active probe has minimum electrical loading on the device under test (DUT) and allows protocol data capture without affecting the performance of the DUT. In an industry-first feature, PGY-SSM protocol analyzer allows continuous streaming of protocol data from PGY-SSM Protocol Analyzer to the host system (using USB3.0 or GbE interface) running the UI. Comprehensive decoding of protocol data, command units, and real time error analysis enable effective verification of communication of SD/SDIO/eMMC host and device. PGY-SSM Protocol Analyzer enables design and verification engineers to test and debug SD, SDIO and eMMC by triggering on command, response, data or CRC errors. It also provides instantaneous decoding of Command, Response, CID, CSD and Ext CSD registers. The Analytics feature offers easy to analyse graphical representation of command, response, data and frequency of operation for the acquired duration.
*Key features and benefits▼
● Continuous monitoring of protocol data for long time to capture elusive events (more than 30GB data capture)
● Analysis of captured data per standards for protocol integrity, count of data bursts, CMD CRC errors, Response CRC errors, Data CRC errors, Timing Values and Reserved commands.
● Hardware-based protocol-aware trigger capability in real time enables capturing specific Events. Triggering facility on patterns, commands or error events.
● User can identify the anomalies by decoding command and response arguments.
● Analytics feature provides anlaysis of acquired protocol data by plotting command, response, data and frequency of operation over acquired time.
● Analytics feature also provides the decoding of device registers for easy analysis.
● Filters allow you to view specific packets in decoded protocol packets.
● Search feature for specific events in protocol activity.
● Easy-to-use user interfaces saves time on learning curve.
● Handles long duration capture and displays the decoded data without demanding extensive resources in host computer.
● Inserting markers [using Trigger-In]in protocol activity helps in correlating the input digital signal with Protocol Activity.
● Trigger-out signal for any specific protocol event allows triggering of other instruments such as oscilloscope.
● Interface to host system [running UI]using USB3.0 or Gigabit Ethernet interface.
● Flexibility to upgrade the hardware firmware using GbE interface provides easy field upgradation of firmware.
● Export of Decoded data packets to txt file for further analysis
|Interfaces Supported||SD3.0 (UHS-I), SDIO4.0 and eMMC 4.41/4.51/5.0/5.1 Specifications|
|Protocol Decode||Command, Response, CRC, Data, Boot Data, Arguments, Device registers|
|Data Decode||1 bit, 4 bit, 8 bit SDR or 4, 8 bit DDR|
|Protocol Test||Protocol Integrity, CRC Errors, Timing values, Data CRC Errors, Reserved commands|
|Operating Voltage levels||1.8V, 3.3V|
|Storage Capabillity||Continuous Streaming of protocol activity upto 30GB or 4 to 5 hour capture duration|
|Capture Mode||Manual Run/Stop, Time specific|
|Capture Duration time||1 sec to 5 hours|
|Trigger on||Capture data and/or trigger out signal|
|Trigger Actions||Digital Signal input to mark the activities in Protocol activity|
|Signal Input||Digital Signal input to mark the activities in Protocol activity|
|Host System Interface||USB3.0 or GbE interface|
|Host Machine Minimum||Microsoft Windows 8, Windows 7, 16GB of RAM|
|Requirements||Storage with at least 50GB HDD space for the storing the acquired data|