솔버스(SOLvers) – 계측 솔루션 전문 기술 노트 – SOLvers

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UFS Application

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ssc7
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2016-04-18 15:49
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Universal Flash Storage, 유니버설 플래시 스토리지

버전 2.0UFS고성능저전력필요로하는 모바일 애플리케이션 컴퓨터 시스템에 맞게 조정되어 있습니다.
- 컨트롤러 하나로 펌웨어, 내장 메모리, 외부 기억용 메모리 카드를 취급할 수 있습니다.
- eMMC와 SSD(솔리드 스테이트 드라이브)의 장점을 하나로 통합한 차세대 내장 메모리.
- eMMC보다 우수한 Read, Write 등 데이터 처리 성능 제공.


 Figure 1. Range of I/O Technologies Accommodated by M-PHY

Receiver Testing for M-PHY

Receiver testing has many waveform-generation needs including non-return to zero (NRZ) signaling, pulse width modulation (PWM) signaling, 8b/10b encoding, reference clock, differential signal generation with common-mode DC, and the addition of jitter impairments such as ISI, Pj, and Rj.

Loopback mode is the most common mechanism for receiver testing, primarily for BERT. In M-PHY loopback testing, the receiver routes and retransmits a recovered M-PHY signal through the transmitter without decoding 8b/10b symbols. Loopback mode requires that both the transmitter and receiver use the same mode and gear. An oscilloscope-based error detector or BERT can perform this testing.

Similar to the transmitter side, software that automates Rx test set and execution can reduce complexity and save time. In addition to an oscilloscope, Rx testing also requires an AWG. A typical configuration is shown in Figure 2. The software typically supports error count testing and provides options to modify the test setup according to device configurations such as the high-speed gear, test time, or loopback duration.



Figure 2. Typical Configuration for M-PHY Receiver Testing